On-wafer CMOS transistors de-embedding method using two transmission lines of different lengths

By using transmission line measurements of arbitrary characteristic impedance, this paper introduces an alternative method to de-embed parasitic structures such as pads and interconnection lines. The proposed method uses two uniform transmission lines of arbitrary characteristic impedance as calibration standard (L-L method). The two transmission lines have the same characteristic impedance, but different lengths. Experimental S-parameters data of on-wafer CMOS FETs de-embedded with the proposed L-L method, Mangan and the Pad-Open-Short De-embedded (PSOD) methods are compared. The S-parameter data de-embedded with both methods the PSOD and the proposed two-tier L-L show high correlation. Therefore the proposed method is validated.