• DocumentCode
    2642747
  • Title

    A mechanism for efficient context switching

  • Author

    Nuth, Peter R. ; Dally, William J.

  • Author_Institution
    Artificial Intelligence Lab., MIT, Cambridge, MA, USA
  • fYear
    1991
  • fDate
    14-16 Oct 1991
  • Firstpage
    301
  • Lastpage
    304
  • Abstract
    Context switches are slow in conventional processors because the entire processor state must be saved and restored, even if much of the restored state is not used before the next context switch. This unnecessary data movement is required because of the coarse granularity of binding between names and registers. The context cache is introduced, which binds variable names to individual registers. This allows context switches to be very inexpensive, since registers are only loaded and saved out as needed. Analysis shows that the context cache holds more live data than a multithreaded register file, and supports more tasks without spilling to memory. Circuit simulations show that the access time of a context cache is 7% greater than a conventional register file of the same size
  • Keywords
    buffer storage; storage management; circuit simulation; coarse granularity; context cache; context switching; multithreaded register file; names; registers; Artificial intelligence; Circuit simulation; Pipelines; Registers; Switches; Switching circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-2270-9
  • Type

    conf

  • DOI
    10.1109/ICCD.1991.139903
  • Filename
    139903