A process-scalable RF transceiver for short range communication in 90 nm Si CMOS

This paper presents the RF CMOS transceiver that potentially has the process scalability in terms of area and supply voltage. The proposed transceiver does not contain any inductor and employs inverter-based topology for attaining scalability and large voltage headroom. The prototype transceiver for short-range communication fabricated in 90nm Si CMOS process has area of 0.2mm² and achieves 500 Mb/s communication at 1V supply voltage. The transmitter with the new linearity compensation technique provides EVM of less than -28 dB at -5dBm output from 0.5 to 2.5 GHz range. The receiver employs active peaking and cherry-hooper techniques and realizes sensitivity of -60dBm and dynamic range of 50 dB at 1 GHz.