Title :
WAVSTAN: Waveform based Variational Static Timing Analysis
Author :
Tiwary, Saurabh K. ; Phillips, Joel R.
Author_Institution :
Cadence Berkeley Labs., CA
Abstract :
We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dynamic (SPICE-level) analysis. The core idea is to break the modulation of waveforms processed by a circuit into two parts: (a) non-linear circuit elements e.g., transistors, diodes etc. and (b) linear elements: transmission line, RLC network etc. The non-linear and linear parts of the circuit are then solved using a combination of current-source modeling, model order reduction methodology, perturbation analysis and learning-based Galerkin methods which helps us get SPICE-like accuracies. The proposed method is potentially as robust and 10-20times faster than current-source based gate modeling methodologies
Keywords :
Galerkin method; RLC circuits; SPICE; linear network analysis; nonlinear network analysis; perturbation techniques; reduced order systems; timing circuits; transmission networks; variational techniques; RLC network; SPICE-level analysis; WAVSTAN; current-source modeling; full dynamic analysis; learning-based Galerkin methods; linear circuit elements; model order reduction methodology; nonlinear circuit elements; perturbation analysis; static delay approximations; transmission line; waveform based variational static timing analysis; Analytical models; Circuit simulation; Data mining; Integrated circuit interconnections; Logic gates; Propagation delay; RLC circuits; Robustness; Timing; Voltage;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
DOI :
10.1109/DATE.2007.364424