• DocumentCode
    2642930
  • Title

    Rapid and Accurate Latch Characterization via Direct Newton Solution of Setup/Hold Times

  • Author

    Srivastava, Shweta ; Roychowdhury, Jaijeet

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Minnesota Univ.
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Characterizing setup/hold times of latches and registers, a crucial component for achieving timing closure of large digital designs, typically occupies months of computation in industries such as Intel and IBM. We present a novel approach to speed up latch characterization by formulating the setup/hold time problem as a scalar nonlinear equation h(tau) = 0 derived using state-transition functions, and then solving this equation by Newton-Raphson (NR). The local quadratic convergence of NR results in rapid improvements in accuracy at every iteration, thereby significantly reducing the computation needed for accurate determination of setup/hold times. We validate the fast convergence and computational advantage of the new method on transmission gate and C2MOS latch/register structures, obtaining speedups of 4-10times over the current standard of binary search
  • Keywords
    Newton-Raphson method; flip-flops; nonlinear equations; CMOS latch structures; CMOS register structures; Newton solution; Newton-Raphson equation; latch characterization; local quadratic convergence; scalar nonlinear equation; setup/hold times; state-transition functions; transmission gate; Clocks; Computational modeling; Convergence; Delay; Differential algebraic equations; Latches; Metastasis; Nonlinear equations; Registers; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364425
  • Filename
    4211935