Intrinsic fluctuations in Vertical NAND flash memories

Author

Nowak, Etienne ; Kim, Jae-Ho ; Kwon, HyeYoung ; Kim, Young-Gu ; Sim, Jae Sung ; Lim, Seung-Hyun ; Kim, Dae Sin ; Lee, Keun-Ho ; Park, Young-Kwan ; Choi, Jeong-Hyuk ; Chung, Chilhee

Author_Institution

Semicond. R&D Center, Samsung Electron. Co. Ltd., Hwasung, South Korea

fYear

2012

fDate

12-14 June 2012

Firstpage

21

Lastpage

22

Abstract

Vertical NAND (VNAND) technology relies on polysilicon for channel material. Two intrinsic variation sources of the cell threshold voltage induced by polysilicon traps have been identified and simulated: Random Trap Fluctuation (RTF) and Random Telegraph Noise (RTN). We demonstrate that RTN is enhanced by the polysilicon material and an original model explains the asymmetric RTN distribution observed after endurance. This work enables the prediction of V_T distribution for VNAND devices in MLC operation.

Keywords

flash memories; integrated circuit noise; asymmetric RTN distribution; cell threshold voltage; channel material; intrinsic fluctuations; intrinsic variation sources; polysilicon material; polysilicon traps; random telegraph noise; random trap fluctuation; vertical NAND flash memories; Energy states; Fluctuations; Pulse measurements; Silicon; Threshold voltage; Very large scale integration; Voltage measurement; 3D; Flash; NAND; Polysilicon Channel; Random Telegraph Noise; Random Trap Fluctuation; Vertical NAND;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2012 Symposium on

Conference_Location

Honolulu, HI

ISSN

0743-1562

Print_ISBN

978-1-4673-0846-5

Electronic_ISBN

0743-1562

Type

conf

DOI

10.1109/VLSIT.2012.6242441

Filename

6242441