Title :
Worst-Case Design and Margin for Embedded SRAM
Author :
Aitken, Robert ; Idgunji, Sachin
Author_Institution :
ARM, Sunnyvale, CA
Abstract :
An important aspect of design for yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previously, this has involved multiple simulation corners and extreme test conditions. It is shown that statistical concerns and device variability now require a different approach, based on work in extreme value theory. This method is used to develop a lower-bound for variability-related yield in memories
Keywords :
SRAM chips; embedded systems; integrated circuit yield; design for yield; embedded SRAM; extreme value theory; variability-related yield; worst-case design; Circuit simulation; Product design; Random access memory; Robustness; Stress; Temperature sensors; Testing; Threshold voltage; Timing; Virtual manufacturing;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
DOI :
10.1109/DATE.2007.364475
