Enhancement of data retention and write current scaling for sub-20nm STT-MRAM by utilizing dual interfaces for perpendicular magnetic anisotropy

Author

Jeong-Heon Park ; Kim, Youngjae ; Lim, W.C. ; Kim, Ji H. ; Park, Sang Ho ; Kim, Ji H. ; Kim, Wonhee ; Kim, Kwan Weon ; Jeong, J.H. ; Kim, Kwang Soon ; Kim, Heonhwan ; Lee, Y.J. ; Oh, S.C. ; Lee, J.E. ; Park, S.O. ; Watts, S. ; Apalkov, D. ; Nikitin, V. ;

Author_Institution

Semicond. R&D Center, Samsung Electron. Co., Ltd., Hwasung, South Korea

fYear

2012

fDate

12-14 June 2012

Firstpage

57

Lastpage

58

Abstract

We investigate the sub-20nm level scalability of STT-MRAM cells possessing perpendicular magnetization induced from the interface of free layer (FL) and MgO tunnel barrier. We demonstrate that the MTJs utilizing dual interfaces of FL and MgO exhibit enhanced scalability with high thermal stability and low switching current, compared with the MTJs with a single interface. As thermal stability factor (Δ) varies as a function of MTJ dimension, MTJs with dual interfaces show Δ over 60 at 20nm node, while MTJs of single interface show Δ around 33. MTJs with dual interface also exhibit lower switching current per thermal stability (Ic/Δ), ~1/2 level of single interface MTJs.

Keywords

MRAM devices; magnesium compounds; magnetic anisotropy; thermal stability; MTJ; MgO; MgO tunnel barrier; data retention enhancement; dual interface; free layer; perpendicular magnetic anisotropy; perpendicular magnetization; size 20 nm; sub-20nm STT-MRAM; sub-20nm level scalability; switching current; thermal stability factor; write current scaling enhancement; Current measurement; Magnetic tunneling; Scalability; Stability analysis; Switches; Thermal factors; Thermal stability;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2012 Symposium on

Conference_Location

Honolulu, HI

ISSN

0743-1562

Print_ISBN

978-1-4673-0846-5

Electronic_ISBN

0743-1562

Type

conf

DOI

10.1109/VLSIT.2012.6242459

Filename

6242459