• DocumentCode
    2644244
  • Title

    Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison

  • Author

    Puau, Isabelle ; Pais, Christophe

  • Author_Institution
    Univ. de Rennes I/IRISA
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and scratchpad memories. The contents of on-chip memory, although selected off-line, is changed at run-time, for the sake of scalability with respect to task size. Experimental results show that the algorithm yields to good ratios of on-chip memory accesses on the worst-case execution path, with a tolerable reload overhead, for both types of on-chip memories. Furthermore, we highlight the circumstances under which one type of on-chip memory is more appropriate than the other depending of architectural parameters (cache block size) and application characteristics (basic block size)
  • Keywords
    cache storage; semiconductor storage; system-on-chip; hard real-time systems; locked caches; off line selection; on-chip memories; scratchpad memories; Documentation; Hardware; Manuals; Program processors; Programming profession; Random access memory; Real time systems; Runtime; Scalability; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364510
  • Filename
    4212020