DocumentCode :
2644559
Title :
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications
Author :
Lee, S. ; Johnson, J. ; Greene, B. ; Chou, A. ; Zhao, K. ; Chowdhury, M. ; Sim, J. ; Kumar, A. ; Kim, D. ; Sutton, A. ; Ku, S. ; Liang, Y. ; Wang, Y. ; Slisher, D. ; Duncan, K. ; Hyde, P. ; Thoma, R. ; Deng, J. ; Deng, Y. ; Rupani, R. ; Williams, R. ; Wag
Author_Institution :
Semicond. R&D Center, IBM, Essex Junction, VT, USA
fYear :
2012
fDate :
12-14 June 2012
Firstpage :
135
Lastpage :
136
Abstract :
We demonstrate advanced modeling and optimization of 32nm high-K metal gate (HKMG) SOI CMOS technology for high-speed digital and RF/analog system-on-chip applications. To enable high-performance RF/analog circuit design, we present challenging device modeling features and their enhancements. At nominal Lpoly, floating-body NFET and PFET demonstrate peak fT of 300GHz and fMAX of higher than 350GHz with excellent model-to-hardware accuracy. For precision analog circuit design, body-contacted (BC) FETs and various passives are offered, and their performance and modeling accuracy are co-optimized to push the technology limit and achieve state-of-the-art circuits, e.g., 28Gb/s serial link transceiver and LC-tank VCO operating at higher than 100GHz.
Keywords :
CMOS analogue integrated circuits; MOSFET; high-k dielectric thin films; integrated circuit design; integrated circuit modelling; silicon-on-insulator; submillimetre wave integrated circuits; submillimetre wave transistors; system-on-chip; BC FET; HKMG SOI CMOS modeling; HKMG SOI CMOS optimization; LC-tank VCO; RF-analog SoC applications; RF-analog system-on-chip applications; bit rate 28 Gbit/s; body-contacted FET; floating-body NFET; floating-body PFET; frequency 300 GHz; high-K metal gate SOI CMOS technology; high-performance RF-analog circuit design; high-speed digital applications; model-to-hardware accuracy; precision analog circuit design; serial link transceiver; size 32 nm; CMOS integrated circuits; CMOS technology; FETs; Logic gates; Radio frequency; Semiconductor device modeling; Solid modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4673-0846-5
Electronic_ISBN :
0743-1562
Type :
conf
DOI :
10.1109/VLSIT.2012.6242498
Filename :
6242498
Link To Document :
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