DocumentCode :
2644566
Title :
Evaluation of Design for Reliability Techniques in Embedded Flash Memories
Author :
Godard, Benoit ; Daga, Jean-Michel ; Torres, Lionel ; Sassatelli, Gilles
Author_Institution :
Dept. of Libraries & Design Tools, Embedded Non-Volatile Memory Group, Rousset
fYear :
2007
fDate :
16-20 April 2007
Firstpage :
1
Lastpage :
6
Abstract :
Nonvolatile flash memories are becoming more and more popular in systems-on-chip (SoC). Embedded flash (eFlash) memories are based on the well-known floating-gate transistor concept. The reliability of such type of technology is a growing up issue for embedded systems; endurance and retention are of course the main features to analyze. To enhance memory reliability current eFlash memories designs use techniques such as error correction code (ECC), redundancy or threshold voltage (VT ) analysis. In this paper, a memory model to evaluate the reliability of eFlash memory arrays under distinct enhancement schemes is developed
Keywords :
embedded systems; error correction codes; flash memories; semiconductor device reliability; system-on-chip; embedded flash memories; error correction code; floating-gate transistor; nonvolatile flash memories; systems-on-chip; Error correction; Error correction codes; Flash memory; Libraries; Nonvolatile memory; Random access memory; Redundancy; Robots; Silicon; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
Type :
conf
DOI :
10.1109/DATE.2007.364529
Filename :
4212039
Link To Document :
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