DocumentCode
2644634
Title
Accounting for Cache-Related Preemption Delay in Dynamic Priority Schedulability Analysis
Author
Ju, Lei ; Chakraborty, Samarjit ; Roychoudhury, Abhik
Author_Institution
Dept. of Comput. Sci., Nat. Univ. of Singapore
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
Recently there has been considerable interest in incorporating timing effects of micro architectural features of processors (e.g. caches and pipelines) into the schedulability analysis of tasks running on them. Following this line of work, in this paper the authors show how to account for the effects of cache-related preemption delay (CRPD) in the standard schedulability tests for dynamic priority schedulers like EDF. Even if the memory space of tasks is disjoint, their memory blocks usually map into a shared cache. As a result, task preemption may introduce additional cache misses which are encountered when the preempted task resumes execution; the delay due to these additional misses is called CRPD. Previous work on accounting for CRPD was restricted to only static priority schedulers and periodic task models. Our work extends these results to dynamic priority schedulers and more general task models (e.g. sporadic, generalized multiframe and recurring real-time). The authors show that the schedulability tests are useful through extensive experiments using synthetic task sets, as well as through a detailed case study
Keywords
cache storage; delays; scheduling; timing; CRPD; cache-related preemption delay; memory blocks; schedulability analysis; synthetic task sets; task preemption; timing effects; Delay effects; Dynamic scheduling; Microarchitecture; Performance analysis; Pipelines; Processor scheduling; Resumes; Testing; Timing; Vehicle dynamics;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364534
Filename
4212044
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