A flexible message passing mechanism for Objective VHDL

Author

Putzke-Röming, Wolfram ; Radetzki, Martin ; Nebel, Wolfgang

Author_Institution

OFFIS, Germany

fYear

1998

fDate

23-26 Feb 1998

Firstpage

242

Lastpage

249

Abstract

When defining an object-oriented extension to VHDL, the necessary message passing is one of the most complex issues and has a large impact on the whole language. This paper identifies the requirements for message passing suited to model hardware and classifies different approaches. To allow abstract communication and reuse of protocols on system level, a new, flexible message passing mechanism proposed for Objective VHDL is introduced

Keywords

hardware description languages; message passing; object-oriented languages; synchronisation; transport protocols; Objective VHDL; abstract communication; flexible message passing mechanism; hardware modelling; object-oriented extension; protocol reuse; Communication system control; Contracts; Dispatching; Encapsulation; Hardware; Message passing; Object oriented modeling; Protocols; Yarn;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 1998., Proceedings

Conference_Location

Paris

Print_ISBN

0-8186-8359-7

Type

conf

DOI

10.1109/DATE.1998.655863

Filename

655863

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2645473