Analysis and experimental validation of processor load for event-driven controllers

Event-driven controllers differ from the standard digital controllers as their sample times are generally not periodic (time equidistant). In literature several proposals for event-driven controllers are made in order to reduce the number of control updates and consequently the processor load needed for its implementation. This is possible without deteriorating the control performance significantly. However, experimental validation has not been presented in literature. This paper aims at filling this gap. Simulations, as well as experiments on a copier paper path test setup, show that a reduction in the number of control updates indeed results in a considerable reduction of the processor load, with only a small decrease of control performance. Furthermore, we present a method to predict the processor load very accurately, without having to implement the controller on a test setup.