Title :
Implementation of scalable elliptic curve cryptosystem crypto-accelerators for GF(2m)
Author :
Cohen, Aaron E. ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., MN, USA
Abstract :
This paper focuses on designing elliptic curve crypto-accelerators in GF(2m) that are cryptographically scalable and hold some degree of reconfigurability. Previous work in elliptic curve crypto-accelerators focused on implementations using projective coordinate systems for specific field sizes. Their performance, scalar point multiplication per second (kP/s) was determined primarily by the underlying multiplier implementation. In addition, a multiplier only implementation and a multiplier plus divider implementation are compared in terms of critical path, area and area time (AT) product. Our multiplier only design, designed for high performance, can achieve 6314 kP/s for GF(2571) and requires 47876 LUTs. Meanwhile our multiplier and divider design, with a greater degree of reconfigurability, can achieve 44 kP/s for GF(2571). However, this design requires 27355 LUTs, and has a significantly higher AT product. It is shown that reconfigurability with the reduction polynomial significantly benefits from the addition of a low latency divider unit and scalar point multiplication in affine coordinates. In both cases the performance is limited by a critical path in the control logic.
Keywords :
Galois fields; cryptography; reconfigurable architectures; GF; Galois fields; control logic; elliptic curve crypto-accelerator; multiplier; reconfigurable architectures; Arithmetic; Cities and towns; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Galois fields; Hardware; Public key cryptography; Security; Table lookup;
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on
Print_ISBN :
0-7803-8622-1
DOI :
10.1109/ACSSC.2004.1399177