DocumentCode :
2646033
Title :
An Embedded and Efficient Low Memory Hierarchical Image Coder
Author :
Wang, Ren-long ; Hao, Yan-ling ; Liu, Ying ; Xi, Jin
Author_Institution :
Coll. of Autom., Harbin Eng. Univ., Harbin
fYear :
2008
fDate :
15-17 Aug. 2008
Firstpage :
385
Lastpage :
388
Abstract :
An embedded and efficient low memory hierarchical image coder is expressed in this passage. The memory occupancy can be reduced through four measures adopted in the arithmetic in the process of coding and coding efficiency can be increasingly improved, respectively. The four measures mentioned above are: (1) adopt a large quantized interval (2) define bit-length and establish block bit-length chart in terms of block maximal absolute value to substitute for lists in the process of fining and ranking, so memory space can be saved; (3) output bit-length chart in terms of bit-length difference and limit code current; (4) swift search according to bit-length chart and overcome repeating scan. The experimental results showed that: the arithmetic can reduce memory occupancy in the process of coding and increase the coding speed effectively, meanwhile, it can keep the high quality of SNR. It has great significance in hardware design for wavelet coding.
Keywords :
codecs; image coding; bit-length chart; block maximal absolute value; code current; coding efficiency; embedded image coder; low memory hierarchical image coder; memory occupancy; wavelet coding; Arithmetic; Automation; Current measurement; Educational institutions; Electronic mail; Extraterrestrial measurements; Hardware; Image coding; Signal processing; Wavelet coefficients;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Information Hiding and Multimedia Signal Processing, 2008. IIHMSP '08 International Conference on
Conference_Location :
Harbin
Print_ISBN :
978-0-7695-3278-3
Type :
conf
DOI :
10.1109/IIH-MSP.2008.44
Filename :
4604081
Link To Document :
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