• DocumentCode
    2646371
  • Title

    Scan-chain optimization algorithms for multiple scan-paths

  • Author

    Kobayashi, Susurnu ; Edahiro, Masato ; Kubo, Mikio

  • Author_Institution
    C&C Media Res. Labs., NEC Corp., Kawasaki, Japan
  • fYear
    1998
  • fDate
    10-13 Feb 1998
  • Firstpage
    301
  • Lastpage
    306
  • Abstract
    This paper presents an algorithm framework for the scan-chain optimization problem in multiple-scan design methodology. It also presents algorithms we propose based on the framework; these are the first algorithms ever proposed for multiple-scan designing. Experiments using actual design data show that, for ten scan-paths, our algorithms achieved a 90% reduction in scan-test time at the expense of a 7% total scan-path length increase as compared with the length of a single optimized scan-path
  • Keywords
    logic design; logic testing; optimisation; algorithm framework; design data; multiple scan-paths; multiple-scan design methodology; optimized scan-path; scan-chain optimization algorithm; scan-chain optimization problem; scan-test time; Algorithm design and analysis; Circuits; Design methodology; Design optimization; Flip-flops; Laboratories; Optimization methods; Pins; Routing; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-4425-1
  • Type

    conf

  • DOI
    10.1109/ASPDAC.1998.669474
  • Filename
    669474