DocumentCode :
2646938
Title :
A tag coprocessor architecture for symbolic languages
Author :
Fuentes-Sánchez, Vicente ; Cheung, Peter Y K
Author_Institution :
Dept. of Electr. Eng., Imperial Coll., London, UK
fYear :
1991
fDate :
14-16 Oct 1991
Firstpage :
370
Lastpage :
373
Abstract :
A novel architecture is presented for the efficient execution of symbolic languages on conventional von Neumann, register-based machines. Unlike other symbolic processing architectures, this is based on a tag coprocessor (TC) which is designed to work in parallel with a conventional RISC CPU such as the MIPS R3000. The TC performs almost all the tag manipulation operations independently of the CPU. It can also perform stack height checking, range checking and loop control. This design significantly enhances the execution speed of symbolic languages such as Lisp and Prolog on a RISC processor, yet all existing software for the CPU without the TC will work with minimal modification. The simplicity of the TC architecture provides a cost-effective way of designing systems specifically for artificial intelligence applications
Keywords :
computer architecture; microprocessor chips; satellite computers; symbol manipulation; Lisp; MIPS R3000; Prolog; RISC CPU; artificial intelligence; loop control; range checking; register-based machines; stack height checking; symbolic languages; tag coprocessor architecture; tag manipulation; Application software; Artificial intelligence; Central Processing Unit; Computer architecture; Coprocessors; Educational institutions; Hardware; Reduced instruction set computing; Runtime; Technical Activities Guide -TAG;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
Type :
conf
DOI :
10.1109/ICCD.1991.139922
Filename :
139922
Link To Document :
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