• DocumentCode
    2647108
  • Title

    Software model checking via large-block encoding

  • Author

    Beyer, Dagmar ; Cimatti, Alessandro ; Griggio, Alberto ; Keremoglu, M.E. ; Sebastiani, R.

  • Author_Institution
    Simon Fraser Univ., Burnaby, BC, Canada
  • fYear
    2009
  • fDate
    15-18 Nov. 2009
  • Firstpage
    25
  • Lastpage
    32
  • Abstract
    Several successful approaches to software verification are based on the construction and analysis of an abstract reachability tree (ART). The ART represents unwindings of the control-flow graph of the program. Traditionally, a transition of the ART represents a single block of the program, and therefore, we call this approach single-block encoding (SBE). SBE may result in a huge number of program paths to be explored, which constitutes a fundamental source of inefficiency. We propose a generalization of the approach, in which transitions of the ART represent larger portions of the program; we call this approach large-block encoding (LBE). LBE may reduce the number of paths to be explored up to exponentially. Within this framework, we also investigate symbolic representations: for representing abstract states, in addition to conjunctions as used in SBE, we investigate the use of arbitrary Boolean formulas; for computing abstract-successor states, in addition to Cartesian predicate abstraction as used in SBE, we investigate the use of Boolean predicate abstraction. The new encoding leverages the efficiency of state-of-the-art SMT solvers, which can symbolically compute abstract large-block successors. Our experiments on benchmark C programs show that the large-block encoding outperforms the single-block encoding.
  • Keywords
    Boolean functions; program verification; symbol manipulation; trees (mathematics); Boolean predicate abstraction; C programs benchmark; Cartesian predicate abstraction; abstract reachability tree; abstract successor state; arbitrary Boolean formulas; control flow graph; large block encoding; single block encoding; software model checking; software verification; symbolic representation; Availability; Computer industry; Construction industry; Encoding; Scalability; Simultaneous localization and mapping; Software tools; Subspace constraints; Surface-mount technology; Tree graphs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods in Computer-Aided Design, 2009. FMCAD 2009
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-4966-8
  • Electronic_ISBN
    978-1-4244-4966-8
  • Type

    conf

  • DOI
    10.1109/FMCAD.2009.5351147
  • Filename
    5351147