Title :
A 200MHz low-power direct digital frequency synthesizer based on mixed structure of angle rotation
Author :
Shuqin, Wan ; Yiding, Huang ; Kaihong, Zhang ; Zongguang, Yu
Author_Institution :
Sch. of Inf. Eng., Jiangnan Univ., Wuxi, China
Abstract :
Direct digital frequency synthesizer(DDS) is a new technology for frequency synthesis. This paper describers the implementation of a direct digital frequency employs a new architecture in 0.35 ¿m CMOS technology. The first rotation implementer by using a CORDIC realized in pipeline and carry-save arithmetic. The directions of the CORDIC rotations are computed in parallel by using a little lookup table, for the first rotation. In order to reduce the circuit latency and increase the speed, the final rotation is multiplier-based, employing CMOS-DPL logic. The final circuit experiment results show the power dissipation as low as 1.44mW/MHz and the maximum clock frequency 200 MHZ.
Keywords :
CMOS logic circuits; carry logic; direct digital synthesis; CMOS-DPL logic; CORDIC; carry-save arithmetic; frequency 200 MHz; low-power direct digital frequency synthesizer; size 0.35 mum; Arithmetic; CMOS technology; Computer architecture; Concurrent computing; Delay; Frequency synthesizers; Logic circuits; Pipelines; Power dissipation; Table lookup; CORDIC algorithm; Direct digital frequency synthesizer (DDFS); angle rotation; pipeline;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351174
