Title :
A VLSI Algorithm for Integer Square-Rooting
Author :
Takagi, Naofumi ; Takagi, Kazuyoshi
Author_Institution :
Dept. of Inf. Eng., Nagoya Univ.
Abstract :
A VLSI algorithm for integer square-rooting is proposed. It is based on the radix-2 non-restoring square-rooting algorithm. Fast computation is achieved by the use of the radix-2 signed-digit representation. Nonetheless, the algorithm does not require normalization of the operand. Combinational (unfolded) implementation of the algorithm yields a regularly structured array square-rooter. Its delay is proportional to n, the bit length of the operand, while that of conventional ones is at least proportional to n log n.
Keywords :
VLSI; digital arithmetic; VLSI algorithm; integer square-rooting; radix-2 nonrestoring square-rooting algorithm; radix-2 signed-digit representation; regularly structured array square-rooter; Application software; Array signal processing; Delay; Hardware; Microprogramming; Signal processing algorithms; Signal restoration; Software algorithms; Software libraries; Very large scale integration;
Conference_Titel :
Intelligent Signal Processing and Communications, 2006. ISPACS '06. International Symposium on
Conference_Location :
Yonago
Print_ISBN :
0-7803-9732-0
Electronic_ISBN :
0-7803-9733-9
DOI :
10.1109/ISPACS.2006.364734
