• DocumentCode
    2647634
  • Title

    Restructuring logic representations with easily detectable simple disjunctive decompositions

  • Author

    Sawada, Hiroshi ; Yamashita, Shigeru ; Nagoya, Akira

  • Author_Institution
    NTT Commun. Sci. Labs., Kyoto, Japan
  • fYear
    1998
  • fDate
    23-26 Feb 1998
  • Firstpage
    755
  • Lastpage
    759
  • Abstract
    Simple disjunctive decomposition is a special case of logic function decomposition, where variables are divided into two disjoint sets and there is only one newly introduced variable. This paper presents that many simple disjunctive decompositions can be found easily by detecting symmetric variables or checking variable cofactors. We also propose an algorithm that constructs a new logic representation for a simple disjunctive decomposition by assigning constant values to variables in the original representation. The algorithm enables us to apply the decomposition with keeping good structures of the original representation. We have performed experiments to restructure fanout free cones of multi-level logic circuits, and obtained better results than when not restructuring them
  • Keywords
    combinational circuits; formal logic; logic CAD; multivalued logic circuits; disjoint sets; disjunctive decompositions; fanout free cones; logic function decomposition; logic representations; multi-level logic circuits; symmetric variables detection; variable cofactors checking; Boolean functions; Circuit synthesis; Data structures; Laboratories; Logic functions; Logic testing; Performance evaluation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 1998., Proceedings
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-8359-7
  • Type

    conf

  • DOI
    10.1109/DATE.1998.655943
  • Filename
    655943