Title :
High-speed FDTD simulation algorithm for GPU with compute unified device architecture
Author :
Takada, N. ; Shimobaba, T. ; Masuda, N. ; Ito, T.
Author_Institution :
Sony Inst. of Higher Educ., Shohoku Coll., Atsugi, Japan
Abstract :
In this paper, we propose a high-speed FDTD algorithm for GPU. Our algorithm includes two important techniques: coalesced global memory access on a GPU board and the improved cache block algorithm for GPU which resembles that for the central processing unit (CPU). Our algorithm achieved an approximately 20- fold improvement in computational speed compared with a conventional CPU at the maximum computational speed of the GPU.
Keywords :
coprocessors; finite difference time-domain analysis; memory architecture; GPU; coalesced global memory access; compute unified device architecture; graphics processing unit; high-speed FDTD simulation algorithm; improved cache block algorithm; Central Processing Unit; Computational modeling; Computer architecture; Computer simulation; Concurrent computing; Electromagnetic fields; Finite difference methods; Kernel; Magnetic fields; Time domain analysis;
Conference_Titel :
Antennas and Propagation Society International Symposium, 2009. APSURSI '09. IEEE
Conference_Location :
Charleston, SC
Print_ISBN :
978-1-4244-3647-7
DOI :
10.1109/APS.2009.5171728
