A jitter measurement circuit based on dual resolution vernier oscillator

This paper presents a new on-chip jitter measurement circuit based on a dual vernier oscillator (VO) structure. The new structure measures the jitter with a low resolution VO first and then with a high resolution VO, thus greatly expanding the measurement range of the jitter and reducing the test time. The oscillators are implemented with differential digital controlled delay elements, whose oscillation periods can be precisely controlled. The circuit has been implemented and verified with the SMIC 0.18 ¿m technology and has been shown to have the ability of measuring jitters in the pico-second range.