Title :
Novel TSC CMOS circuit
Abstract :
Totally self-checking (TSC) circuit is a class of circuits which are used to detect faults concurrently with normal operation. This paper introduces a new method for designing self-checking static CMOS circuit. The designed circuit based on the proposed method can detect breaks and transistor stuck-on faults. The resulting circuit produces a valid code (00 or 11) on its output in the fault-free. Otherwise, this circuit produces an invalid code (01 or 10) on their outputs in the presence of such faults. The validity and effectiveness are verified through the HSPICE simulation.
Keywords :
CMOS digital integrated circuits; HSPICE simulation; self-checking static CMOS circuit; totally self-checking circuit; transistor stuck-on faults; Built-in self-test; Circuit faults; Circuit simulation; Design for testability; Electrical fault detection; Fault detection; MOS devices; MOSFETs; Variable structure systems; Very large scale integration; CMOS Circuit; Design-for-Test; Reliability; Self-Checking Circuit; Testing;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351199
