Title :
Surface-potential-based analysis of bias-dependent series resistance in LDD MOSFET
Author :
Chen, Lei ; Sun, Ling-Ling ; Liu, Jun
Author_Institution :
Key Lab. for RF Circuits & Syst. of Minist. of Educ., Hangzhou Dianzi Univ., Hangzhou, China
Abstract :
A surface-potential-based analysis to calculate the overlap resistance in LDD MOSFET is presented in this paper. The gate and drain bias is automatically included in this calculation which is compatible with current surface-potential-based MOS model. The results prove that this model has good accuracy, but with much less complexity compared with already reported ones.
Keywords :
MOSFET; circuit complexity; surface potential; LDD MOSFET; bias-dependent series resistance; current surface-potential-based MOS model; drain bias; gate bias; surface-potential-based analysis; Contact resistance; Doping; Electric resistance; Electrons; MOSFET circuits; Sun; Surface resistance; Transconductance; Transistors; Voltage; LDD; overlap region; series resistance; surface potential;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351210
