DocumentCode
2648269
Title
Architecture of SystemC based emulator for ReMAP
Author
Wei, Lai ; Dai, Peng ; Wang, Xin´an ; Liu, Yanliang
Author_Institution
Shenzhen Grad. Sch., Peking Univ., Shenzhen, China
fYear
2009
fDate
20-23 Oct. 2009
Firstpage
1255
Lastpage
1259
Abstract
A SystemC based emulator architecture optimized for reconfigurable array processor is proposed. With novel architecture, the emulator support performance evaluation, rtl co-simulation as well as system software development. The emulator has been used in the development of a reconfigurable multimedia application processor (ReMAP) which has been successfully fabricated under SMIC 0.18 um processing.
Keywords
CMOS digital integrated circuits; microprocessor chips; multimedia systems; reconfigurable architectures; ReMAP; SMIC processing; SystemC based emulator; reconfigurable array processor; reconfigurable multimedia application processor; rtl cosimulation; size 0.18 mum; Application software; Computer architecture; Control systems; Fabrics; Laboratories; Monitoring; Multimedia systems; Postal services; Space technology; System software; Co-simulation; Emulator; Reconfigurable Array Processor; System Modeling; SystemC;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location
Changsha, Hunan
Print_ISBN
978-1-4244-3868-6
Electronic_ISBN
978-1-4244-3870-9
Type
conf
DOI
10.1109/ASICON.2009.5351215
Filename
5351215
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