DocumentCode
2648404
Title
A hardware encryption and decryption system design
Author
Lei, Zhan ; Jing, Zhao
Author_Institution
Coll. of the First Aeronaut. of the Air Force, Xinyang, China
Volume
5
fYear
2010
fDate
16-18 April 2010
Abstract
In allusion to the malpractice about pure software encryption techniques, this article puts forward an exploring thought and design process of a hardware encryption and decryption system. This system applies DES encryption algorithm, implements hardware encryption and on-line upgrade. It adopts FPGA chip and MCU as the control cores, applies microchip control technology to implement PCI bus protocol, DES algorithm and the communication with the storage device through a self-defined interface.
Keywords
cryptographic protocols; field programmable gate arrays; microcontrollers; DES encryption algorithm; FPGA chip; MCU; PCI bus protocol; decryption system design; hardware encryption design; microchip control technology; self-defined interface; software encryption techniques; Centralized control; Communication system control; Cryptography; Data security; Educational institutions; Field programmable gate arrays; Hardware; Information security; Protection; Universal Serial Bus; DES; FPGA; MCU; decryption; encryption;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Engineering and Technology (ICCET), 2010 2nd International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-6347-3
Type
conf
DOI
10.1109/ICCET.2010.5485378
Filename
5485378
Link To Document