Accelerated reliability evaluation for high density packaging integrated circuits

The demand for miniaturization, increased functionality, better performance and lower cost has forced the electronics industry to shift from traditional packaging techniques to advanced high density packaging technologies. As the packaging density increases, the packaging reliability becomes more essential. In this paper, an accelerated reliability test method to evaluate the packaging reliability of high density packaging integrated circuits (ICs) is presented. Differing from the traditional reliability prediction methods, the technology of FIMV (Force current measure voltage) was applied during the reliability test which allowed the reliability performance of ICs to be assessed in real time. It was found that the voltage changed correspondingly for the different stress changing conditions. So it is validated that the use of FIMV technology as an indicator of degradation of packaging property is effective. The experimental results show that thermal cycling stress can affect the adhesion of the interfaces in plastic packaging ICs. Temperature change during the thermal cycling test and the mismatch between the CTEs of the encapsulant and the adjacent material of plastic packaging ICs can lead to thermo-mechancial stresses that can cause delamination or de-adhesion. Additionally it is found that unwanted Au-Al intermetallic compound may form at the bond interface because of the effect of high temperature. The formation of the unwanted Au-Al intermetallic compound will reduce the bond strength and lead to wire bond lift-off finally. At last future research work in this field is suggested.