Title :
Pin assignment for wire length minimization after floorplanning phase
Author :
He, Xu ; Dong, Sheqin
Author_Institution :
Tsinghua Nat. Lab. for Inf. Sci. & Technol., Beijing, China
Abstract :
In this paper, we present a pin assignment algorithm which can be applied after floorplanning phase for wire length optimization. In order to reassign pins globally for all the nets, we formulate a Mixed Integer Linear Programming (MILP) for this problem. Since the MILP problem is a NP-hard problem, and the solution space is on a large scale, we introduce a simulated annealing algorithm to solve the MILP problem. The results show that our algorithm can further reduce the wire length by 10.22% within less than one minute averagely.
Keywords :
VLSI; circuit layout; integer programming; linear programming; floorplanning phase; mixed integer linear programming; pin assignment; simulated annealing; wire length minimization; Helium; Integrated circuit interconnections; Large-scale systems; Minimization methods; NP-hard problem; Pins; Routing; Simulated annealing; Space technology; Wire; MILP; Pin assignment; post-floorplanning; simulated annealing; wire length minimization;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351234
