DocumentCode :
2648772
Title :
Scheduling partitioned algorithms on processor arrays with limited communication supports
Author :
Chou, W.H. ; Kung, S.Y.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
fYear :
1993
fDate :
25-27 Oct 1993
Firstpage :
53
Lastpage :
64
Abstract :
It is important that array designs, especially the scheduling of partitioned arrays, must cope with various kinds of communication constraints such as interconnection topology, channel bandwidth, and inhomogeneous communication delay. The interprocessor communication requirements can be dictated by the dependence vectors and size of the partitioned tiles. A folded constraint graph is created to describe timing constraints between computation and communication events. An integer-programming based method can then be adopted to find an optimal execution schedule, including offset between the start times of processors, which satisfies these constraints
Keywords :
constraint theory; graph theory; integer programming; multiprocessor interconnection networks; parallel algorithms; parallel architectures; processor scheduling; array designs; channel bandwidth; communication constraints; dependence vectors; folded constraint graph; inhomogeneous communication delay; integer-programming based method; interconnection topology; limited communication supports; optimal execution schedule; partitioned algorithms; partitioned tiles; processor arrays; start times; timing constraints; Bandwidth; Delay; Optical computing; Partitioning algorithms; Processor scheduling; Scheduling algorithm; Tiles; Timing; Topology; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Array Processors, 1993. Proceedings., International Conference on
Conference_Location :
Venice
ISSN :
1063-6862
Print_ISBN :
0-8186-3492-8
Type :
conf
DOI :
10.1109/ASAP.1993.397120
Filename :
397120
Link To Document :
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