Asynchronous dual-mode buck converter design with protection circuits in 0.13µm CMOS process for battery applications

An asynchronous architecture dual-mode DC-DC buck converter utilizing an external Schottky diode was evaluated and implemented in SMIC 0.13 μm 1P6M 3.3/2.5 V logic signal CMOS technology. This paper aimed to employ a simple, low cost, and small solution size with on-chip compensation implementation while not compromising high efficiency requirement. Maintaining high efficiency is achieved by adopting a switch-mode pulse-width modulation (PWM) and pulse-frequency modulation (PFM) control schemes for heavy load and light load, respectively. Other features for this design include a proposed simple internal circuit structure for over-temperature (OTP) and over-voltage protection (OVP), and a soft-start operation to suppress the power-on inrush current and when OTP and OVP cease. This converter can operate at internally fixed 1.5 MHz with input voltage from 2.0 V to 3.6 V suitable for two dry batteries powered applications. A low output voltage is easily supported with 0.5 V feedback voltage reference. An overall peak efficiency was observed at about 93.9% and 84% at Vout of 1.8 V and 1.2 V, respectively.