Analysis and design of a fully integrated SoC for UHF RFID reader in CMOS technology

Author

Wang, Jingchao ; Zhang, Chun ; Chi, Baoyong ; Wang, ZhiHua

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2009

fDate

20-23 Oct. 2009

Firstpage

415

Lastpage

418

Abstract

This paper presents a fully integrated single-chip UHF radio frequency identification (RFID) reader SoC for short distance handheld applications. The SoC integrates all building blocks-including an RF transceiver, a PLL frequency synthesizer, a digital baseband and a MCU-in a 0.18 Â¿m CMOS process. A high-linearity RX front-end and a low-phase-noise sythesizer are designed to handle the large self-interferer. A class-E power amplifier with high power efficiency is also integrated to fulfill the function of a RFID reader. The chip has a die area of 5.1 mm*3.8 mm including pads.

Keywords

CMOS integrated circuits; UHF power amplifiers; frequency synthesizers; integrated circuit design; phase locked loops; radiofrequency identification; system-on-chip; transceivers; CMOS technology; PLL frequency synthesizer; RF transceiver; UHF radiofrequency identification reader; class-E power amplifier; low-phase-noise sythesizer; system-on-chip; Baseband; CMOS process; CMOS technology; Frequency synthesizers; High power amplifiers; Phase locked loops; Radio frequency; Radiofrequency amplifiers; Radiofrequency identification; Transceivers; RFID; Reader; SoC; UHF;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2009. ASICON '09. IEEE 8th International Conference on

Conference_Location

Changsha, Hunan

Print_ISBN

978-1-4244-3868-6

Electronic_ISBN

978-1-4244-3870-9

Type

conf

DOI

10.1109/ASICON.2009.5351255

Filename

5351255