DocumentCode :
2649136
Title :
Systolic design of a new finite field division/inverse algorithm
Author :
Conway, Richard ; Nelson, John
Author_Institution :
Dept. of Electron. and Comput. Eng., Limerick Univ., Ireland
fYear :
1993
fDate :
25-27 Oct 1993
Firstpage :
188
Lastpage :
191
Abstract :
A systolic architecture of a newly developed algorithm for performing division and inversion over GF(2m) has been successfully realized. It is novel in that the normal inverse/multiplication steps are integrated and the generator polynomial is selectable. The new design with its inherent regularity offers an expandable, fully pipelined high performance circuit, that is very suitable to a VLSI implementation. A GF(28) divider has been successfully implemented under the EUROCHIP program
Keywords :
VLSI; computational complexity; dividing circuits; pipeline arithmetic; systolic arrays; EUROCHIP program; GF(2m); VLSI implementation; finite field division/inverse algorithm; fully pipelined high performance circuit; generator polynomial; regularity; systolic architecture; Algorithm design and analysis; Circuits; Equations; Galois fields; Matrices; Optical signal processing; Polynomials; Reed-Solomon codes; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Array Processors, 1993. Proceedings., International Conference on
Conference_Location :
Venice
ISSN :
1063-6862
Print_ISBN :
0-8186-3492-8
Type :
conf
DOI :
10.1109/ASAP.1993.397142
Filename :
397142
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2649136
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