Architecture-dependent register allocation and instruction scheduling on VLIW

Author

Wang, Lei ; Chen, Gui

Author_Institution

Sch. of Comput., Beijing Univ. of Aeronaut. & Astronaut., Beijing, China

Volume

2

fYear

2010

fDate

16-18 April 2010

Abstract

Architecture-dependent optimization is very important for VLIW architecture. In this paper we have described a new architecture of VLIW-EPRC. And a new architecture-dependent optimization method based on micro-operation for exploiting the characteristics of target machine is described. The software bypassing based on static single-assignment is used to allocate pseudo registers, and the scheduling and register assignment algorithm with heuristics is adopted. Finally, the experimental results of Livermore and Whetstone are given.

Keywords

instruction sets; optimising compilers; parallel architectures; processor scheduling; VLIW-EPRC architecture; architecture-dependent optimization method; architecture-dependent register allocation; instruction scheduling; register assignment algorithm; scheduling; software bypassing; static single-assignment; target machine characteristics; Computer aided instruction; Computer architecture; Hardware; Optimization methods; Parallel processing; Pipelines; Registers; Scheduling algorithm; Software algorithms; VLIW; Architecture-dependent optimization; VLIW; list scheduling; software bypassing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Engineering and Technology (ICCET), 2010 2nd International Conference on

Conference_Location

Chengdu

Print_ISBN

978-1-4244-6347-3

Type

conf

DOI

10.1109/ICCET.2010.5485441

Filename

5485441