DocumentCode
2649607
Title
Advancing Moore´s law: Challenges and opportunities
Author
Bai, Peng
Author_Institution
Intel, USA
fYear
2009
fDate
20-23 Oct. 2009
Firstpage
7
Lastpage
8
Abstract
Summary form only given. Moore´s law has been the guiding principle of silicon CMOS technology scaling for four decades. Transistor density has been doubled every two years in Intel microprocessors since early 70. Intel´s latest dual core Itanium® 2 server chip has deployed 1.72 billion transistors vs. 2,250 transistors in the 4004 processor introduced in 1971. Same density improvement trends can be found in memory and other ASIC products as well. The remarkable progress in packing more functionality, complexity, and performance into a single silicon chip could have not been achieved without numerous innovations in IC manufacturing technologies, lithography, transistors, interconnects and packaging. In this presentation, the author provides a review of most critical process technology innovations in the last decade, including advanced lithography, strained silicon transistors, high k/metal gate transistors, Cu metallization, and low k ILD. The last decade of Moore´s law has been characterized by significant differences, compared to the first three decades of silicon scaling, in the types of technical challenges and innovations that are required to advance Moore´s law. The insight into the challenges and opportunities will help guide advancing Moore´s law into the future.
Keywords
CMOS integrated circuits; application specific integrated circuits; integrated circuit manufacture; lithography; semiconductor device manufacture; silicon-on-insulator; ASIC; Cu metallization; IC manufacturing; Moore law; high k/metal gate transistor; lithography; low k ILD; process technology innovation; silicon CMOS technology scaling; single silicon chip; strained silicon transistor; transistor density; Application specific integrated circuits; CMOS technology; Integrated circuit packaging; Lithography; Manufacturing; Microprocessors; Moore´s Law; Silicon; Technological innovation; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location
Changsha, Hunan
Print_ISBN
978-1-4244-3868-6
Electronic_ISBN
978-1-4244-3870-9
Type
conf
DOI
10.1109/ASICON.2009.5351292
Filename
5351292
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