Title :
Design of a VLSI circuit for on-line evaluation of several elementary functions using their Taylor expansions
Author :
Bajard, Jean-Claude ; Guyot, Alain ; Muller, Jean-Michel ; Skaf, Ali
Author_Institution :
CNRS, Lyon, France
Abstract :
The authors present a new modular architecture for the online evaluation of power series. It can be used to quickly compute any function that can be approximated by the first terms of its Taylor expansion (i.e., most math functions). For trigonometric functions, the method matches Cordic-like methods and leads to more regular architectures. The authors also present a VLSI implementation of this architecture
Keywords :
VLSI; function evaluation; multiplying circuits; parallel algorithms; parallel architectures; pipeline arithmetic; Taylor expansions; VLSI circuit; elementary functions; math functions; power series; regular architectures; trigonometric functions; Arithmetic; Circuits; Computer architecture; Delay; Encoding; Filtering; Polynomials; Signal processing algorithms; Taylor series; Very large scale integration;
Conference_Titel :
Application-Specific Array Processors, 1993. Proceedings., International Conference on
Conference_Location :
Venice
Print_ISBN :
0-8186-3492-8
DOI :
10.1109/ASAP.1993.397172