DocumentCode :
2649841
Title :
Memory process and test techniques for known good die
Author :
Chrusciel, Richard W.
Author_Institution :
ETEC Inc., USA
fYear :
1994
fDate :
8-9 Aug 1994
Firstpage :
130
Lastpage :
134
Abstract :
This paper discusses four methods of die mount into temporary packages that allow full electrical parameter and temperature range testing to be performed. For evaluation of each method an IDT 71B74 8K x 8-bit cache TAG RAM is used. The four methods are: 1) tape automated bonding (TAB); 2) temporary wirebond into traditional IC packages; 3) temporary contact with micro-probe packages; and 4) solder-bump attach/contact to die. A description of each method, along with benefits and short comings is provided. Applicability of each to either wire bond or flip chip manufacturing is also important to MCM designers. Start-up and long term production costs are presented
Keywords :
Bonding; Contacts; Integrated circuit packaging; Performance evaluation; Random access memory; Read-write memory; Technical Activities Guide -TAG; Temperature distribution; Testing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Technology, Design and Testing, 1994., Records of the IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-6245-X
Type :
conf
DOI :
10.1109/MTDT.1994.397185
Filename :
397185
Link To Document :
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