A response compactor for extended compatibility scan tree construction

Though test application time and test power is reduced drastically in the extended compatibility scan tree, the number of output is too large. This paper proposes a response compactor to reduce its output number as well as the test response data volume. This compactor is composed by an XOR network. Exploring the characteristic of extended compatibilities and the structure information of the circuit under test, it can effectively solve error diffusion problem, and achieves low hardware overhead. Experimental results show the applicability of the response compactor. As for the ISCAS´89 benchmark circuits, the compactor can have the highest compression ratio to 77 while keeping the same fault coverage.