DocumentCode :
2651381
Title :
Digital static calibration technology used for 16-bit DAC
Author :
Dongmei, Zhu ; Dongbing, Fu ; Jiangang, Shi ; Kaicheng, Li
Author_Institution :
Nat. Labs. of Analog Integrated Circuits, Sichuan Inst. of Solid-state Circuits, Chongqing, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
1081
Lastpage :
1084
Abstract :
In this study, the digital static calibration technique used for 400 MSPS, 16-bit high-resolution current steering DAC is described. The calibration technique uses address generator, comparator, SAR register, and calibration DAC to comprise successive approximation calibration loop. With the calibration loop, the respective calibration of array units of current source can be implemented automatically one by one, thus improving greatly matchability of current source. The differential nonlinearity error of 16-bit current steering DAC with the calibration technology reaches a true 16-bit relative static resolution with DNL<±0.5 LSB.
Keywords :
calibration; digital-analogue conversion; 16-bit high-resolution current steering DAC; 16-bit relative static resolution; SAR register; address generator; comparator; comprise successive approximation calibration loop; differential nonlinearity error; digital static calibration technology; Analog integrated circuits; Calibration; Control systems; Equations; Fuses; MOSFETs; Signal resolution; Solid state circuits; Temperature; Threshold voltage; DC resolution; DNL; SAR; current steering DAC; digital static calibration; mismatch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351393
Filename :
5351393
Link To Document :
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