Characteristics and sensitivity of p-type junctionless gate-all-around nanowire transistor

In this study, we for the first time assess the characteristics and sensitivity of p-type junctionless (JL) gate-all around (GAA) nanowire transistor using 3D quantum transport device simulation for CMOS technology implementation. Since the doping concentration of p-type junctionless nanowire transistor does not as high as in n-type device due solid solubility of boron in silicon, it can be made by using midgap gate electrode material for appropriate threshold voltage. The p-type JLGAA transistor shows good on/off current ratio and better short channel characteristics compare to conventional inversion mode GAA structure. The sensitivity analyses show that the channel thickness affects the device performance such as threshold voltage (V_th), on current (I_on), and off current (I_off) significantly. In contrast, the channel length and oxide thickness have less impact owing to well control of short channel effect.