Title :
A 15-µs fast-locking frequency synthesizer for reconfigurable wireless systems
Author :
Liu, Junhua ; Liao, Huailin ; Huang, Ru
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing, China
Abstract :
A fast-locking wideband CMOS frequency synthesizer for reconfigurable wireless applications is presented. An analog coarse tuning loop with a large loop bandwidth is used for fast locking, and new adaptive loop filters are proposed to stabilize the coarse tuning voltage when the loop is switched off. The frequency synthesizer with a 1.95-2.6 GHz frequency range is fabricated in 0.18 μm CMOS process and achieves a settling time of 15-μs with loop bandwidth of 100 kHz. So far as we know, this is the fastest locking speed for wideband frequency synthesizers with the same loop bandwidth.
Keywords :
CMOS integrated circuits; UHF integrated circuits; adaptive filters; frequency synthesizers; CMOS process; adaptive loop filters; analog coarse tuning loop; bandwidth 100 kHz; coarse tuning voltage; fast-locking frequency synthesizer; fast-locking wideband CMOS frequency synthesizer; frequency 1.95 GHz to 2.6 GHz; loop bandwidth; reconfigurable wireless systems; size 0.18 μm; time 15 μs; Adaptive filters; Bandwidth; Calibration; Frequency synthesizers; Phase frequency detector; Phase noise; Tuning; Voltage control; Voltage-controlled oscillators; Wideband; Frequency synthesizer; dual-loop; settling time; wideband;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351422