Title :
Tool capabilities needed for designing 100 MHz interconnects
Author :
Schreyer, Tim A.
Author_Institution :
Archit. Labs., Intel Corp., Hillsboro, OR, USA
Abstract :
Printed circuit board design complexity increases greatly as bus speeds exceed 100 MHz. This increased complexity is due more to the large number of simulations a designer must complete rather than simulation or modeling accuracy. This paper presents the case for these increased numbers of simulations, and presents techniques for managing this complexity
Keywords :
circuit CAD; integrated circuit interconnections; printed circuit design; printed circuit testing; 100 MHz interconnects; printed circuit board design complexity; simulations; tool capabilities; Circuit simulation; Clocks; Computational modeling; Delay; Electronic mail; Equations; Integrated circuit interconnections; Printed circuits; System buses; Timing;
Conference_Titel :
Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-4425-1
DOI :
10.1109/ASPDAC.1998.669506
