DocumentCode :
2652394
Title :
Hierarchical neural model: L3
Author :
Chou, Wen-Kuang ; Yun, D.Y.Y.
Author_Institution :
Basic. Res. Lab., Chung-Li, Taiwan
fYear :
1991
fDate :
18-21 Nov 1991
Firstpage :
2311
Abstract :
It is observed that none of the currently popular learning algorithms are in-place learning algorithms. Instead of finding an in-place learning algorithm, which is considered impossible by the authors, a hierarchical neural model (L3) is proposed. L3 consists of a massively parallel architecture for recalling (MPAR) and a learning heuristics controller (LHC). Two operation modes of neural networks, recalling and learning, were realized by the two solid architectures (MPAR and LHC). Due to the separability of these two architectures, L3 has rechargeable capability. As a result, the function of L3 is very similar to the programmable logic array. The significance of L3 lies in the solid architecture of MPAR and LHC, and the rechargeable capability
Keywords :
learning systems; neural nets; parallel architectures; L3; hierarchical neural model; learning heuristics controller; massively parallel architecture; neural networks; recalling; rechargeable capability; Algorithm design and analysis; Computer networks; Intelligent systems; Iterative algorithms; Large Hadron Collider; Network topology; Neural networks; Programmable logic arrays; Solids; Unsupervised learning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 1991. 1991 IEEE International Joint Conference on
Print_ISBN :
0-7803-0227-3
Type :
conf
DOI :
10.1109/IJCNN.1991.170733
Filename :
170733
Link To Document :
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