Reinvestigation of dot formation mechanisms in silicon nanowire channel single-electron/hole transistors operating at room temperature

Dot formation mechanisms of single-electron transistors (SETs) and single-hole transistors (SHTs) are reinvestigated. “Shared channel” SET/SHTs in form of nanowire (NW) channel FETs are fabricated and characterized. It is suggested that, in addition to quantum confinement effect (QCE), the positive charges create parasitic dots in SHT channels resulting in multiple-dot SHTs. It is concluded that a <;110>; SET is the best structure to obtain room temperature (RT) operating single-dot device with high yield.