A high-efficiency low-cost wire-bond loop antenna for CMOS wafers

The performance of a vertical-type loop antenna made by two asymmetrical wire bonds on a low-resistivity silicon substrate was investigated. The large-loop height was increased from 0 to 0.3 lambda_o, and the peak gain and radiation efficiency were observed after numerically removing the feed-line loss of 4 dB/mm at 50 GHz. When the loop height was increased from 0 to 0.2 lambda_o, the radiation efficiency showed a big improvement from 5.3 % to 40.2 % on a silicon substrate of ~8 Omega.cm resistivity. Wire bonding is not only a cost-effective but also repeatable process, and this antenna can be easily connected to the front-end circuit with a differential-feed network. Therefore, the proposed vertical-type wire-bond antenna is a promising technique for high-efficiency on-chip radio antennas.