DocumentCode
2652721
Title
Root mean square time interval error accumulation along slave clock chains
Author
Carbonelli, Marco ; De Seta, D. ; Perucchini, Daniele
Author_Institution
Fondazione Ugo Bordoni, Rome, Italy
Volume
2
fYear
1993
fDate
23-26 May 1993
Firstpage
816
Abstract
The main aspects of synchronization strategies suitable for application to synchronous digital hierarchy (SDH) based transport networks are discussed, with particular emphasis on the relative phase stability of distributed timing signals. Based on a mathematical model of slave clocks and a reference structure of the synchronization network, a theoretical approach to the calculation of root mean square relative time interval error between SDH equipment clocks and the primary reference clock of the network is described. The comparison of results from extensive calculations allows more insight on the behavior of cascaded slave clocks and the derivation of important suggestions for the synchronization network design
Keywords
cascade systems; clocks; error analysis; jitter; synchronisation; synchronous digital hierarchy; SDH; cascaded slave clocks; distributed timing signals; mathematical model; primary reference clock; relative phase stability; root mean square relative time interval error; slave clock chains; synchronization network design; synchronization strategies; synchronous digital hierarchy; Clocks; Frequency synchronization; Jitter; Master-slave; Mathematical model; Partial response channels; Robust stability; Root mean square; Synchronous digital hierarchy; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, 1993. ICC '93 Geneva. Technical Program, Conference Record, IEEE International Conference on
Conference_Location
Geneva
Print_ISBN
0-7803-0950-2
Type
conf
DOI
10.1109/ICC.1993.397386
Filename
397386
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