Title :
3.4GS/s 3 bit phase digitizing ADC and DAC for DRFM
Author :
Zhang, Min ; Zhang, Youtao ; Li, Xiaopeng ; Liu, Ao ; Qian, Feng
Author_Institution :
Integrated Circuit Lab., Nanjing Electron. Devices Inst., Nanjing, China
Abstract :
This paper design and realize 3 bit phase digitizing analog-to-digital converter (ADC) and digital-to-analog converter (DAC) for digital radio frequency memory (DRFM). The instantaneous bandwidth (IBW) of the DRFM is enhanced by high sampling rate. Test results show that the highest sampling rate is 3.4 GS/s and the core power dissipation of ADC and DAC is 350 mW and 300 mW, respectively.
Keywords :
analogue-digital conversion; digital radio; digital storage; digital-analogue conversion; microwave integrated circuits; DAC; DRFM; analog-to-digital converter; digital radio frequency memory; digital-to-analog converter; phase digitizing ADC; power 300 mW; power 350 mW; word length 3 bit; Analog-digital conversion; Bandwidth; Digital communication; Frequency conversion; Laboratories; Modems; Power dissipation; Preamplifiers; Sampling methods; Timing; Analog-to-Digital converter; Digital-to-Analog converter; digital radio frequency memory; phase digitizing;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351485
