DocumentCode
2653117
Title
A 3.3mw 91dB SNR sigma-delta modulator in 0.18μm CMOS process
Author
Yueyang, Chen ; Shun, Zhong ; Hua, Dang
Author_Institution
Sch. of Inf. & Electron., Beijing Inst. of Technol., Beijing, China
fYear
2009
fDate
20-23 Oct. 2009
Firstpage
215
Lastpage
217
Abstract
This paper presents the design and simulation results of a sigma-delta modulator that serves audio application. Accurate system and circuit design of the ADC enable it to meet the SNR of 91 dB and standards while consuming only 3.3 mW. The modulator is implemented in SMIC 0.18μm CMOS technology and operates with a 3.3 V supply.
Keywords
CMOS integrated circuits; audio equipment; low-power electronics; sigma-delta modulation; CMOS process; audio application; power 3.3 mW; sigma-delta modulator; size 0.18 μm; voltage 3.3 V; CMOS process; CMOS technology; Capacitance; Capacitors; Delta-sigma modulation; Energy consumption; Sampling methods; Stability; Switches; Topology; Sigma-delta modulator; low-power; switch capacitor;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location
Changsha, Hunan
Print_ISBN
978-1-4244-3868-6
Electronic_ISBN
978-1-4244-3870-9
Type
conf
DOI
10.1109/ASICON.2009.5351494
Filename
5351494
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