DocumentCode :
2653361
Title :
A class of good quasi-cyclic low-density parity check codes based on progressive edge growth graph
Author :
Li, Zongwang ; Kumar, B. V K Vijaya
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Volume :
2
fYear :
2004
fDate :
7-10 Nov. 2004
Firstpage :
1990
Abstract :
We present a new class of quasi-cyclic low density parity check (QC-LDPC) codes, whose quasi-cyclic nature makes them attractive for implementation. Both regular and irregular QC-LDPC codes are designed by modifying the progressive edge growth (PEG) graph with a quasi-cyclic constraint. Simulations show that these QC-LDPC codes offer hardware-friendly parity check matrices and have as good error correction performance as random LDPC codes and other good QC-LDPC codes. In addition, the proposed QC-LDPC codes offer a much more flexible set of parameters compared to the traditional designs.
Keywords :
error correction; graph theory; parity check codes; error correction performance; hardware-friendly parity check matrices; progressive edge growth graph; quasi-cyclic constraint; quasi-cyclic low-density parity check codes; Computer architecture; Design methodology; Error correction codes; Geometry; Iterative decoding; Null space; Parity check codes; Quantum cascade lasers; Sparse matrices; Sum product algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on
Print_ISBN :
0-7803-8622-1
Type :
conf
DOI :
10.1109/ACSSC.2004.1399513
Filename :
1399513
Link To Document :
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